1. Field of the Invention
The present invention relates to a method of fabricating an organic light emitting display (OLED) and, more particularly, to a method of forming an opposite electrode of an OLED having a top emission region and a bottom emission region such that the opposite electrode is simultaneously formed on the top emission region and the bottom emission region.
2. Description of the Related Art
An OLED is an emissive display that emits light by electrically exciting a fluorescent organic compound. The OLED is classified into a passive matrix type and an active matrix type depending on how driving pixels are arranged in a matrix or array form. The active matrix OLED consumes less power and has a higher resolution than the passive matrix OLED; therefore, the active matrix OLED is better suited for a large-sized display. The OLED is further classified into a top emission type, a bottom emission type, and a double-sided emission type based on a direction of light emitted from the organic compound. For example, the top emission OLED emits light in an opposite direction to a substrate having unit pixels and has a high aperture ratio.
Demands for an OLED which incorporates both a main display, which is a top emission type, and an auxiliary display, which is a bottom emission type, is increasing for small-sized and low power consumption devices, such as cellular phones, handheld wireless devices, etc. Such type of the OLED is commonly used in cellular phones, which have a main display on one side and an auxiliary display on the other side. For example, when the cellular phone is in an idle mode, a user may observe such things as a call receiving state, battery information, time, etc., through the auxiliary display.
FIG. 1a is a cross-sectional view of a conventional top emission OLED. Referring to FIG. 1a, a buffer layer 110 having a predetermined thickness is formed on a substrate 100, and then a thin film transistor (TFT) having a polysilicon pattern 122, a gate electrode 132 and source and drain electrodes 150 and 152 is formed on the buffer layer 110. Source and drain regions 120, which are ion-implanted, are formed at opposite sides of the polysilicon pattern 122, and a gate insulating layer 130 is formed on the entire surface of the structure including the polysilicon pattern 122. The gate electrode 132 is formed on the gate insulating layer 130, and an interlayer insulating layer 140 is formed on gate electrode 132 and the gate insulating layer 130.
A passivation layer 160 having a predetermined thickness is subsequently formed on the entire surface of the structure and is etched by a photolithography process to form a first via contact hole (not shown) which exposes one, for example, the drain electrode 152, of the source and drain electrodes 150 and 152. The passivation layer 160 may be formed of a silicon nitride layer, a silicon oxide layer or a stacked layer of the silicon nitride layer and the silicon oxide layer.
A first insulating layer 170 is formed on the entire surface of the structure. The first insulating layer 170 may be made of polyimide, benzocyclobutene-series resin, spin on glass (SOG), or acrylate. The first insulating layer 170 is formed for planarization of an emission region.
Subsequently, the first insulating layer 170 is etched by a photolithography process to form a second via contact hole (not shown), which exposes the first via contact hole.
A reflecting layer (not shown) is subsequently formed on the entire surface of the structure. The reflecting layer is made of a material having a high reflectivity, such as aluminum, an aluminum alloy, molybdenum, titanium, gold, silver, and palladium.
The reflecting layer is subsequently etched by a photolithography process to form a reflecting layer pattern 180 in the emission region.
A thin layer for a pixel electrode (not shown) is subsequently formed on the entire surface of the structure. The pixel electrode thin layer is made of a transparent metal material, such as indium tin oxide (ITO).
The pixel electrode thin layer is subsequently etched by a photolithography process to form a pixel electrode 182. The pixel electrode 182 contacts one of the source and drain electrodes 150 and 152, e.g, the drain electrode 152 exposed by the second via contact hole. The pixel electrode 182 has a dual-layer structure including the reflecting layer pattern 180.
A second insulating layer (not shown) is subsequently formed on the entire surface of the structure. The second insulating layer may be made of polyimide, benzocyclobutene, phenol-series resin, or acrylate. The second insulating layer is etched by a photolithography process to form a second insulating layer pattern 190 defining an emission region.
An emission layer 184 is formed in the emission region defined by the second insulating layer pattern 190 using a low molecular deposition technique or a laser induced thermal imaging technique. The emission layer 184 includes an organic emission layer (not shown) and at least one of an electron injection layer, an electron transport layer, a hole injection layer, a hole transport layer, and a hole blocking layer (not shown).
A magnesium-silver (Mg—Ag) layer is subsequently formed on the entire surface of the structure to form an opposite electrode 186a. The Mg—Ag layer is a transparent metal layer that transmits light emitted from the emission layer 184.
FIG. 1b is a cross-sectional view of a conventional bottom emission OLED. Referring to FIG. 1b, when the second via hole of FIG. 1a is formed, a pixel electrode 182 is formed that contacts one of the source and drain electrodes 150 and 152. The pixel electrode 182 of FIG. 1b may have a thickness different from a thickness of the pixel electrode 182 of FIG. 1a due to emission characteristics of the OLED.
A second insulating layer pattern 190 is subsequently formed over the structure to define an emission region of the pixel electrode 182. An emission layer 184 is subsequently formed in the emission region of the pixel electrode 182.
A LiF layer 186b is subsequently formed on the entire surface of the structure. The LiF layer 186b is an interface layer between an emission layer 184, e.g., an organic layer of the emission layer 184, and a reflecting electrode 188 and is approximately 10 Å thick to decrease a work function of the reflecting electrode 188. For example, the reflecting electrode 188 may be made of aluminum.
The reflecting electrode 188 is formed on the LiF layer 186b. The reflecting electrode 188 is formed using a thermal deposition method or a sputtering method. A stacked structure or combination of the LiF layer 186b and the reflecting electrode 188 is used as an opposite electrode.
Alternatively, an opposite electrode having a stacked or combined structure of an Mg—Ag layer and an aluminum layer may be formed after forming the emission layer.
In the OLED described above, the top emission OLED has a different structure than the bottom emission OLEDs relating to formation of the pixel electrode and the opposite electrode. Therefore, forming the top emission OLED and the bottom emission OLED on a single substrate complicates the fabrication process. Further, since the LiF layer of the bottom emission OLED is formed relatively thin, for example, the LiF layer is approximately 10 Å thick, when the reflecting electrode 188 is formed of aluminum using a sputtering method, the emission layer and the pixel electrode are adversely affected because the aluminum, or material used to form the reflecting electrode 188, enters the emission layer 184 through pores in the LiF layer 186b and degrades electrical and optical characteristics of the display. To solve at least the above-described problems, a thermal deposition method may be used to form the aluminum layer; however, this is a very unstable and time consuming process.